[PRL] Fwd: Positions in Formal Verification and Advanced Computer Architecture

[Pete Manolios]

FYI.

Intel is also looking to hire a formal verification person.

"Recent MS, Ph.D. or experienced hire will be considered.  We are
applying formal to a variety of areas in the latest silicon designs.
Please forward to anyone who you think might be interested."




---------- Forwarded message ----------
From: Zaher Andraus <zaher.andraus at reveal-da.com>
Date: Sat, Feb 26, 2011 at 10:30 PM
Subject: Positions in Formal Verification and Advanced Computer Architecture
To: "Karem A. Sakallah" <karem.sakallah at reveal-da.com>,
Randy.Bryant at cs.cmu.edu, Pete Manolios <pete at ccs.neu.edu>, Vimal
Bhalodia <vimb at umich.edu>, Matthew Neagle <matthew.neagle at gmail.com>,
kurt.skifstad at gmail.com, mark.liffiton at reveal-da.com, Amy Cell
<Amy at annarborusa.org>
Cc: zaher.andraus at reveal-da.com


Hello,



Please forward this to relevant candidates.



Reveal Design Automation, Inc. has exciting full-time openings for

experts and experienced individuals in EDA and its application, particularly

in the development and deployment of formal verification techniques and

methodologies for advanced microprocessor architectures.



The positions require advanced skills in programming, scripting, and

debugging for hardware and software; in synthesizing/prototyping

algorithmic solutions with efficient and scalable implementations; and

in modifying and maintaining large pieces of code.





We have two openings:

1. "Senior Algorithms Engineer": will be working on scaling up the core

       formal verification technology.

2. "Senior Verification Engineer": will be working on applying the

       technology to formally verifying advanced hardware circuits, and

       on developing scalable methodologies for its deployment to very

       large designs.



The first position requires knowledge of the inner workings and algorithmic

trade-offs of existing formal technologies, including SAT/SMT engines, BDD

packages, theorem provers, model checkers, and abstraction/refinement.

Experience and/or advanced skills in C++ programming for Lunix is a plus.



The second position requires knowledge of advanced

architectures and design techniques, and a passion for bringing EDA tools

and methodologies to hardware designers. Experience and/or advanced skills

in Verilog is a plus.



Both positions will allow candidates to directly contribute to the early

development of the company’s core technology, to creatively take part in

shaping the company’s early progress and technical image, and to solve

cutting-edge formal verification challenges whose complexity is ever-increasing.



The compensation is competitive and the hiring conditions are flexible.



If interested, please contact me at: zaher.andraus at reveal-da.com.



Thanks.

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Zaher Andraus, Ph.D.

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-- 
Pete Manolios
Northeastern University
http://www.ccs.neu.edu/home/pete