[PRL] Fwd: Seminars Digest, Vol 58, Issue 22

[Mitchell Wand]

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From: seminars-request at lists.csail.mit.edu <
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Date: Oct 18, 2007 12:00 PM
Subject: [temp]  Seminars Digest, Vol 58, Issue 22
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Today's Topics:

   1. TALK:Thursday 10-25-07 Stream Processing: Efficiency through
      Locality (CSAIL Event Calendar)


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From: CSAIL Event Calendar <eventcalendar at csail.mit.edu>
To: seminars at csail.mit.edu
Date: Thu, 18 Oct 2007 10:37:31 -0400
Subject: TALK:Thursday 10-25-07 Stream Processing: Efficiency through
Locality

Stream Processing: Efficiency through Locality
Dertouzos Lecturer Series 2007/2008
Speaker: William Dally
Speaker Affiliation: Stanford University
Host: Anant Agarwal
Host Affiliation: CSAIL

Date: 10-25-2007
Time: 4:00 PM - 5:30 PM
Refreshments: 3:45 PM
Location: 32-123

Abstract:
Semiconductor and processor scaling is leading us toward processor
chips with 10s to 100s of "cores" and distributed on-chip memories.
Parallelism can take advantage of the plentiful and inexpensive
arithmetic units made possible by modern VLSI technology.  However,
without locality, bandwidth quickly becomes a bottleneck.
Communication bandwidth, not arithmetic is the critical resource in a
modern computing system that dominates cost, performance, and power.
Stream programming simplifies the exploitation of both parallelism and
locality.  A stream program naturally exposes parallelism across
stream elements and kernels.  Locality is also exposed - both within
and between kernels.  At a lower level, simplifying the communication
involved in supplying instructions and data to individual cores gives
orders of magnitude improvements in efficiency.  This talk will
discuss exploitation of parallelism and locality with examples drawn
from the Imagine, Merrimac, and EEC projects and from three
generations of stream programming systems

Biography:
Bill Dally is the Willard R. and Inez Kerr Bell Professor of Engineering and
the Chairman of the Department of Computer Science at Stanford University.
Bill is also co-founder, Chairman, and Chief Scientist of Stream Processors,
Inc.  Bill and his group have developed system architecture, network
architecture, signaling, routing, and synchronization technology that can be
found in most large parallel computers today. While at Bell Labs Bill
contributed to the BELLMAC32 microprocessor and designed the MARS hardware
accelerator. At Caltech he designed the MOSSIM Simulation Engine and the
Torus Routing Chip which pioneered wormhole routing and virtual-channel flow
control. While a Professor of Electrical Engineering and Computer Science at
the Massachusetts Institute of Technology his group built the J-Machine and
the M-Machine, experimental parallel computer systems that pioneered the
separation of mechanisms from programming models and demonstrated very low
overhead synchronization and communication mechanisms.  At Stanford
University his group has developed the Imagine processor, which introduced
the concepts of stream processing and partitioned register
organizations.  Bill has worked with Cray Research and Intel to incorporate
many of these innovations in commercial parallel computers, with Avici
Systems to incorporate this technology into Internet routers, co-founded
Velio Communications to commercialize high-speed signaling technology, and
co-founded Stream Processors, Inc. to commercialize stream processor
technology.   He is a Fellow of the IEEE, a Fellow of the ACM, and a Fellow
of the American Academy of Arts and Sciences.  He has received numerous
honors including the IEEE Seymour Cray Award  and the ACM Maurice Wilkes
award.  He currently leads projects on computer architecture, network
architecture, and programming systems. He has published over 200 papers in
these areas, holds over 50 issued patents, and is an author of the
textbooks, Digital Systems Engineering and Principles and Practices of
Interconnection Networks.

Relevant URL(S):
For more information please contact: Colleen Russell, 3-0145,
crussell at csail.mit.edu



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